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Основной контент книги VHDL for Logic Synthesis
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VHDL for Logic Synthesis

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€98

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Making VHDL a simple and easy-to-use hardware description language Many engineers encountering VHDL (very high speed integrated circuits hardware description language) for the first time can feel overwhelmed by it. This book bridges the gap between the VHDL language and the hardware that results from logic synthesis with clear organisation, progressing from the basics of combinational logic, types, and operators; through special structures such as tristate buses, register banks and memories, to advanced themes such as developing your own packages, writing test benches and using the full range of synthesis types. This third edition has been substantially rewritten to include the new VHDL-2008 features that enable synthesis of fixed-point and floating-point hardware. Extensively updated throughout to reflect modern logic synthesis usage, it also contains a complete case study to demonstrate the updated features. Features to this edition include: a common VHDL subset which will work across a range of different synthesis systems, targeting a very wide range of technologies a design style that results in long design lifetimes, maximum design reuse and easy technology retargeting a new chapter on a large scale design example based on a digital filter from design objective and design process, to testing strategy and test benches a chapter on writing test benches, with everything needed to implement a test-based design strategy extensive coverage of data path design, including integer, fixed-point and floating-point arithmetic, logic circuits, shifters, tristate buses, RAMs, ROMs, state machines, and decoders Focused specifically on logic synthesis, this book is for professional hardware engineers using VHDL for logic synthesis, and digital systems designers new to VHDL but familiar with digital systems. It offers all the knowledge and tools needed to use VHDL for logic synthesis. Organised in themed chapters and with a comprehensive index, this complete reference will also benefit postgraduate students following courses on microelectronics or VLSI/ semiconductors and digital design.

Logi sisse, et hinnata raamatut ja jätta arvustus
Raamat Andrew Rushton «VHDL for Logic Synthesis» — loe veebis. Jäta kommentaare ja arvustusi, hääleta lemmikute poolt.
Vanusepiirang:
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Ilmumiskuupäev Litres'is:
09 juuni 2018
Objętość:
486 lk
ISBN:
9780470977927
Üldsuurus:
4.2 МБ
Lehekülgede koguarv:
486
Õiguste omanik:
John Wiley & Sons Limited
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